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ΔΣ Fractional-N PLL With Hybrid IIR Noise Filtering

DOI : 10.1109/TCSII.2019.2929359

[/vc_column_text][vc_column_text] Abstract:

This brief presents a noise filtering method for wideband ΔΣ fractional-N phase-locked loop (PLL). The proposed hybrid infinite impulse response (IIR) phase noise filtering method reduces the building blocks compared to that of hybrid finite impulse response (FIR) filtering technique. A prototype 2-GHz ΔΣ fractional-N PLL with 1-MHz loop bandwidth is implemented in 130-nm CMOS process. Measurement results show that the proposed IIR filtering technique can suppress 5 dB more phase noise than the same order of FIR filter.

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ΔΣ Fractional-N PLL With Hybrid IIR Noise Filtering

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