Hardware-Accelerated ASIC and Cardiac Monitoring System for Wearable Devices
Hardware-Accelerated ASIC and Cardiac Monitoring System for Wearable Devices
Abstract:
Cardiac arrhythmia is a common and potentially life-threatening cardiovascular disorder, requiring timely and accurate detection. This article presents an ultralow-power application-specific integrated circuit (ASIC) for real-time mul-ticlass arrhythmia classification in wearable electrocardiography (ECG) monitoring. Unlike present works that require high computational resources or use limited resources for binary or small-category classification, this work proposes a hardware-friendly ASIC to support seven categories of cardiac arrhythmia classification based on the Association for the Advancement of Medical Instrumentation (AAMI) standard, outperforming most existing chips. Through a shared discrete wavelet transform (DWT) module and an optimized support vector machine (SVM) core, the hardware resources are reduced by over 30% for the optimized SVM and by over 75% when both optimizations are applied together. Through optimized circuit design and low-power design, this ASIC can maintain a high accuracy of 97.2% and an ultralow power consumption of 35.5 nJ/inference, which is lower than most of the existing tasks. This work uses an efficient hardware design to reduce the hardware complexity, making it suitable for wearable devices that require low power consumption. Operating at a frequency of 50 MHz, the ASIC is faster than other deep learning accelerators, enabling rapid on-device detection for early intervention and cloud-assisted diagnosis. A system-level verification was performed to prove the feasibility of ASIC in real scenarios of a 475 mW system power.
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Hardware-Accelerated ASIC and Cardiac Monitoring System for Wearable Devices
