Toward Efficient Logarithmic Converter Circuit Design via Constraint-Driven Parameter Exploration
Abstract:
As a core component of logarithmic number systems, this brief proposes a constraint-driven automated parameter exploration framework for the logarithmic converter circuit. The framework innovatively integrates two optimiza-tion algorithms, including the Intercept Compensation and Error-Flattening Non-Uniform Segmentation Scheme for high-precision implementations and the Unity-Slope Piecewise Linear Approximation for low-precision implementations that require less hardware overhead. Employing constraint-driven automated exploration of adder count, segment count, error-redundancy factor, and segment-point bit-width, optimal parameters are selected for an optimized logarithmic converter implementation. Experimental results demonstrate that compared to state-of-the-art designs with identical maximum absolute error constraints, the proposed circuits achieve superior area (up to 62.7% reduction), power (up to 62.4% reduction), and delay (up to 29.9% reduction), yielding 7.3%–88.5% improvements in the comprehensive error-area-delay-power (eADP) metric.
” Thanks for Visit this project Pages – Register This Project and Buy soon with Novelty “
Toward Efficient Logarithmic Converter Circuit Design via Constraint-Driven Parameter Exploration
