The self-biased ring amplifier (SBRA) is characterized by high power efficiency without the need for external bias and good stability when process, supply voltage, and temperature (PVT) variations are considered. This brief presents an improved SBRA structure implemented by full MOS devices. A cross-coupled pMOS and nMOS pair is used for MOS self-biasing to embed a dead-zone voltage, which reduces the settling time of output. In addition, a modified auto-zeroing scheme is proposed in this brief. A switch-controlled path is introduced in the circuit to improve the stability and linearity, and the load capacitor can be eliminated. The proposed ring amplifier and auto-zeroing scheme is used in a sample-and-hold circuit and has simulated SNR of 68.98 dB for a Nyquist frequency input sampled at 200 MS/s with a 65-nm technology.
Software Implementation:
Modelsim
Xilinx
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An Improved MOS Self-Biased Ring Amplifier and Modified Auto-Zeroing Scheme
