A 40-nm Embedded Flash With Highly Reliable Bitline Transmission
A 40-nm Embedded Flash With Highly Reliable Bitline Transmission and Low-Voltage Current Sense Amplifier
Abstract:
A novel read circuit for embedded flash memory operating from a single 1.1-V supply is presented, featuring a negative-voltage dual-MOS transmission structure for bitline (BL) transfer and a low-voltage, high-reliability current–voltage sense amplifier (SA). This approach effectively addresses the issue of reduced read window size due to decreased BL voltage as supply voltage decreases. The proposed circuit is integrated into a 4.5-Mbit embedded flash memory test chip, fabricated using a 40-nm CMOS process. Experimental results show a read access time of 18.5 ns at a supply voltage of 0.9 V, with a read throughput of 7.78 Gbit/s and a bit density of 3.414 Mbit/mm2 .
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A 40-nm Embedded Flash With Highly Reliable Bitline Transmission and Low-Voltage Current Sense Amplifier
