A 32-Channel, Low Resources and High-Precision FPGA Time-to-Digital Converter (TDC)
A 32-Channel, Low Resources and High-Precision FPGA Time-to-Digital Converter (TDC) Based on Dynamic Phase Shifting (DPS) for 3-D LiDAR Applications
Abstract:
This article demonstrates a low-cost, low-resource field-programmable gate array (FPGA) time-to-digital converter (TDC) method based on dynamic phase shifting (DPS) and high-speed counters with adjustable resolution down to 14.9 ps for 3-D light detection and ranging (LiDAR) applications requiring multichannel TDCs. Delay line-based FPGA TDCs, such as tapped delay line implementations, provide excellent resolution. However, their high resource utilization and the need for detailed bin-by-bin online calibration limit multichannel implementation on low-cost FPGAs. Multiphase clock counter-based FPGA TDCs are a good alternative in terms of low resource consumption, but their resolution is noticeably lower than that of delay line-based FPGA TDCs. The proposed DPS-based FPGA TDC method achieves low resource consumption while maintaining high resolution and precision. To demonstrate the suitability of the proposed DPS-based FPGA TDC for multichannel operation, we implemented 32 TDC channels performing simultaneous pulsewidth and time-of-flight (TOF) measurements. The proposed 32-channel DPS-based FPGA TDC consumes very low resources, requiring only 2519 lookup tables (LUTs) and 2700 D flip-flops (DFFs), corresponding to 3.97% of the LUTs and 2.13% of the DFFs of our low-cost AMD Xilinx XC7A100T-1CSG324C FPGA. In addition, only 70 LUTs and 68 DFFs are required for each additional channel. In addition to low resource consumption, the proposed method achieves high-performance TOF measurements with a precision of 11–16 ps and high linearity, with integral nonlinearity (INL) values between −0.57 and 0.67 least significant bit (LSB) and differential nonlinearity (DNL) values between −0.8 and 0.82 LSB, where the LSB is as small as 10 ps. We believe that the high precision and low resource utilization of the proposed DPS-based FPGA TDC will be a promising solution to design low-cost 3-D LiDARs requiring high-performance multichannel TDCs on a single chip.
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A 32-Channel, Low Resources and High-Precision FPGA Time-to-Digital Converter (TDC) Based on Dynamic Phase Shifting (DPS) for 3-D LiDAR Applications
