A dual-channel multiplier (DCM) for energy efficient second-order piecewise-polynomial function evaluation for 3-D graphics applications is presented in this paper. The performance of the evaluation process is highly dependent on the design of the multiplication and squaring structure. A novel hardware implementation for polynomial evaluation is presented. The proposed approach compensates the complex multipliers by using DCM which reduces the hardware complexity. The DCM scheme performs complex functions with power-efficient and area-efficient approach. The multiplier reduces the hardware computational effort in the piecewise polynomial approximation with uniform or nonuniform segmentation. For large operand input size, a multiplier adder converter and a dedicated radix-4 squaring unit are also proposed. These units achieve the least power consumption compared to previous approaches with large input word size. Comparison with general purpose multiplication has shown reduction in power, and delay by up to 36%, and 50%, respectively. The proposed technique exhibits up to 93% saving in power consumption compared to the current traditional schemes.
Software Implementation:
Modelsim
Xilinx
Advantages:
Does not required hardware complexity, so spacing area is small.Reduction in power consumption.Less amount of delay is produced.
