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Multiplier-free Implementation of Galois Field Fourier Transform on a FPGA

DOI: 10.1109/TCSII.2019.2894361

[/vc_column_text][vc_column_text] Abstract:

A novel approach to implementing Galois Field Fourier Transform (GFT) is proposed that completely eliminates the need for any finite field multipliers by transforming the symbols from a vector representation to a power representation. The proposed method is suitable for implementing GFTs of prime and nonprime lengths on modern FPGAs that have a large amount of on-chip distributed embedded memory. For GFT of length 255 that is widely used in many applications, the proposed memory based implementation exhibits 25% improvement in latency, 27% improvement in throughput, and 56% reduction in power consumption compared to a finite field multiplier based implementation.

Software Implementation:

• Xilinx 14.2

Advantages:

• Less number of multiplications
• Finite filed multiplier will take less computations
• carry additions will added

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